The present invention relates to the formation of nitride features in the process of producing integrated circuits. More particularly, the present invention is directed to a method for etching a nitride layer on a semiconductor wafer that is highly selective to oxide and that has a predeterminable and adjustable critical dimension bias, especially when etching a layer of nitride over oxide. 2. The Relevant Technology
In the current rapid evolution of integrated circuits, semiconductor devices are being formed on the silicon substrates of integrated circuits at increasingly higher device densities and smaller feature sizes. New problems are being presented by the device shrinkage and increased density of semiconductor devices. One such problem is the necessity of building an efficient and reliable process to separate active devices that function on the current miniaturized scale. One method previously used is termed "local oxidation of silicon" (LOCOS) process. The LOCOS process involves the use of a temporary patterned nitride layer which is used as a protection or resistant area to cover the future active areas during the subsequent field oxidation process in forming CMOS gate structures. One example of a process for etching nitride that is being employed in a LOCOS process is taught in U.S. Pat. No. 5,336,395 to David J. Keller et al.
One requirement of using nitride layers with CMOS processes, such as the LOCOS process, is that the nitride layers must be patterned early in the process in preparation for field oxidation with little or no critical dimension bias. Critical dimension bias is defined as the difference in a feature measurement before and after a process flow step, such as comparing the dimension of a feature before being etched and after the etch is completed. FIG. 1 shows a critical dimension A of a layer of patterned photoresist 16 before etching a nitride layer 12. FIG. 2 shows an idealized critical dimension B of pattern photoresist layer 16 and a nitride feature 18 after etching nitride layer 12. A critical dimension bias between A and B, respectively, of FIGS. 1 and 2 will preferably be zero. Although at times a positive or negative critical dimension bias is desired, for the most part a critical dimension bias of zero is more desirable. That is, it is preferred that the critical dimension does not grow or shrink during the etch step.
FIG. 3 shows an example of a negative critical dimension bias. Nitride feature 18 is shown as having an undercut resulting in a substantially negative critical dimension bias. Also shown are feet 24 at a base 22 of nitride feature 18, which feet 24 are undesirable.
In the LOCOS process, and other processes using patterned nitride features, the nitride feature must be etched in such a manner as to be selective to an underlining layer of oxide, such as a pad oxide. Selectivity to the pad oxide results in an etch which stops on the pad oxide without "punching through" to damage the underlining silicon substrate. With the shrinkage of device dimensions, however, pad oxides are necessarily being reduced in thickness. The benefit of a thinner pad oxide is that a smaller isolation of LOCOS can be achieved without damage of the underlying silicon substrate. It is beneficial to prevent silicon substrate damage to prevent current leakage.
A thinner pad oxide requires etch processes with greater selectivity to oxide in order to etch superadjacent nitride layers, while still stopping on the pad oxide. Prior art etch processes have had difficulty in maintaining this pad oxide selectively without undesired side effects such as undercutting and formation of feet described above.
Furthermore, the increasing shrinking and more structurally diverse integrated circuits require smaller line widths. This in turn necessitates a broader depth of focus of photolithography stepper machines. In order to attain a broader depth of focus, thinner photoresist layers must be used when masking and patterning the layer of nitride. Thinner photoresist requires better photoresist selectivity of the etch process. A benefit of a thinner photoresist layer is that smaller sizes can be achieved, such as smaller line sizes or smaller feature sizes.
An emphasis on process chemistry has been used in the past to make thinner photoresist layers. Process chemistry methods can result in nitride etches that are highly selective to oxide, but also result in large formation of polymers, both on the wafer itself as well as on the etcher chamber walls. A buildup of the polymer on the etcher chamber wall lowers the number of wafers that can be etched by the reaction chamber between cleaning cycles of the reaction chamber. A high polymer formation also leads to high fluctuations in etch rate. Additionally, processes that result in high polymer formation are very sensitive to pattern density and therefore to loading effects. Loading effects refer to uneven etching of the wafer between areas with more densely congregated features and more open areas due to varied etch rates. Furthermore, when a pattern to be etched is changed even slightly in a processing step, as normally occurs where processed lines are used to fabricate more than one semiconductor product, such process lines must then be reoptimized with the change of is product type. Reoptimization is both costly and time consuming when running process lines with multiple product.
Other nitride etch processes that are highly selective to oxides tend to have large negative critical dimension bias, due mainly to large isotropic etching of the nitride side wall of nitride features. These processes typically use SF.sub.6 to coat the nitride side walls. SF.sub.6 also causes etch non-uniformity problems due to loading.
As a further example of the prior art, U.S. Pat. No. 5,336,395 mentioned above, teaches the use of Cl.sub.2 to coat the sidewall of the nitride feature to prevent undercutting. The use of Cl.sub.2, however, slows the etch rate of nitride dramatically and increases the etch rate of photoresist, leading to an undesirable low photoresist selectivity. Low photoresist selectivity leads to large critical dimension bias variation and critical dimension repeatability problems, wafer to wafer, and lot to lot.
Many of the highly selective nitride etch processes use gases such as CH.sub.2 F.sub.2, and CH.sub.3 F.sub.3. These processes can achieve high selectivities of up to 15:1 nitride to oxide etching, but also cause high polymer formation on the etcher reaction chamber walls, leading to an undesirably low number of wafers that can be etched in the reaction chamber between cleaning cycles of the reaction chamber, Thus, these processes also have undesirable aspects.
In an example of the prior art difficulties, and referring to FIG. 3, the results of a prior art process for etching nitride can be seen. FIG. 3 shows a typical result of a thin photoresist layer 16 and a thin pad oxide 14, as is increasingly required by more highly miniaturized devices. A critical dimension C is seen in FIG. 3 as having a highly negative critical dimension bias as compared to dimension A of FIG. 1. This has resulted in an undercut 22 and the formation of feet 24.
Prior art processes suffer from loading effects, poor uniformity, poor nitride to oxide selectivity, or poor or inconsistent critical dimension bias, which make such prior art processes inadequate for etching submicron nitride features where thin photoresist layers and thin pad oxides are used.
A need exists in the art for a process which overcomes the foregoing prior art problems. Specifically, a need exists for a process which can etch nitride spacers and other patterned nitride layers with a high selectivity to both thin pad oxides and thin photoresist layers, and which will maintain a desirable critical dimension bias. Additionally, it would be beneficial if such a process were capable in resulting in a selectable critical dimension bias.